NVIDIA Enters the CPU War: Vera Launches Rosa and Feynman Loom

NVIDIA has long designed its own processors — first under the Grace brand — but those chips were always destined for the company’s own platforms. That changed at GTC 2026 in San Jose this week, when CEO Jensen Huang confirmed that NVIDIA’s CPU business is shifting to a fully commercial model, openly competing for the same data center sockets that Intel and AMD have dominated for decades.

The first salvo in that battle is the Vera CPU, now in full production. And behind it, already announced on NVIDIA’s official roadmap, is a second-generation architecture called Rosa, slated for 2028 alongside the Feynman GPU platform — the most ambitious compute architecture NVIDIA has ever previewed.

Vera: The World’s First CPU Built for Agentic AI

NVIDIA describes Vera as something categorically new — not just a faster server chip, but the first CPU designed from the ground up for reinforcement learning and agentic AI workloads, where autonomous AI systems orchestrate complex, multi-step tasks across massive infrastructure.

At the heart of Vera are 88 custom NVIDIA-designed “Olympus” cores, built on the Arm v9.2 instruction set — a significant jump from the 72 cores in the predecessor Grace CPU. But raw core count is only part of the story. Each Olympus core is engineered for high single-thread performance, featuring neural branch prediction, a PyTorch-optimized instruction buffer, and a new technique called Spatial Multithreading — a design that physically partitions each core’s resources between two simultaneous tasks, rather than time-sharing them. Across 88 cores, this yields 176 total concurrent threads, with operators able to tune performance-versus-efficiency balance dynamically at runtime.

Memory performance is another standout. Vera’s LPDDR5X subsystem delivers up to 1.2 TB/s of bandwidth — twice that of conventional general-purpose CPUs — while consuming half the power. Supporting up to 1.5 TB of addressable memory (three times the prior-generation Grace), Vera is built to keep thousands of parallel AI agent environments simultaneously responsive without bottlenecks.

Direct Competition with Intel and AMD

In terms of raw core count, AMD EPYC and Intel Xeon still field 128-core configurations — and Intel continues to hold roughly 60% of the server CPU market, with AMD at around 24%. But NVIDIA isn’t positioning Vera as a general-purpose workhorse. Instead, it’s targeting the emerging bottleneck in AI infrastructure: the orchestration layer. Tasks like Python execution, SQL queries, KV-cache management, and code compilation all burden conventional CPUs when running at AI-factory scale. Vera was designed to handle precisely these workloads, with NVIDIA claiming 1.5× the performance-per-sandbox over x86 competitors and 3× the memory bandwidth per core.

The Vera CPU is now in full production. Commercial systems from Dell Technologies, HPE, Lenovo, and Supermicro — in both single- and dual-socket configurations — are expected to ship in the second half of 2026.

Partners and Early Adopters

Hyperscalers and cloud providers committing to Vera at launch include:

National research institutions including Los Alamos National Laboratory, Lawrence Berkeley National Laboratory, and the Texas Advanced Computing Center (TACC) have also announced plans to deploy Vera-based systems.

The Vera CPU Rack: 256 Chips, One System

Beyond individual processors, NVIDIA unveiled a rack-scale configuration: the Vera CPU Rack, housing 256 liquid-cooled Vera CPUs alongside 74 BlueField-4 DPUs and ConnectX SuperNIC networking cards. The aggregate system weighs in with up to 400 TB of LPDDR5X memory and 300 TB/s of aggregate memory throughput — enough to sustain over 22,500 concurrent, independent CPU environments at full performance. NVIDIA claims this translates to a 6× gain in CPU throughput for AI-centric workloads.

Rosa: A Whole New Architecture for 2028

If Vera is NVIDIA’s opening move in the CPU market, Rosa represents the company’s declaration of long-term intent. Announced as part of NVIDIA’s official 2028 roadmap at GTC 2026, Rosa is an entirely new CPU architecture — not an evolutionary update to Vera, but a ground-up redesign.

Rosa is short for Rosalyn, a reference to Rosalyn Sussman Yalow — the American medical physicist who won the 1977 Nobel Prize in Physiology or Medicine for developing radioimmunoassay, a technique for detecting hormones, viruses, and drugs in serum without biological assays. The name follows NVIDIA’s convention of naming CPU and GPU architectures after celebrated physicists. Yalow notably relinquished the patent on her discovery, allowing it to be used freely worldwide.

Technical details on Rosa’s core architecture remain limited — Jensen Huang chose to keep specifics close to the chest. What is confirmed is that Rosa will form the CPU core of the Feynman platform in 2028, working in tandem with the Feynman GPU via high-speed interconnects, and will pair with the new BlueField-5 DPU and the ConnectX-10 SuperNIC network interface card.

The emergence of Rosa also signals a structural shift in NVIDIA’s development cadence: from four-year cycles to roughly two-year cycles — aligning with the release rhythms of Intel and AMD.

Feynman: NVIDIA’s Most Ambitious Platform Yet

Named after physicist Richard Feynman, the 2028 GPU platform is the star of NVIDIA’s long-range roadmap — and while details are sparse by design, two architectural breakthroughs were confirmed at GTC 2026.

1. 3D Die Stacking

Feynman GPUs will adopt 3D die stacking — vertically layering multiple GPU dies on top of one another, rather than placing them side by side as in Rubin and Rubin Ultra. This architectural shift is expected to unlock new performance scaling paths that aren’t available with conventional planar packaging approaches. Intel is reportedly in the frame as a foundry partner for Feynman, with its advanced EMIB packaging technology a potential fit; TSMC’s 1.6nm process node is also being cited as the likely manufacturing foundation.

2. Custom HBM Memory

Rather than deploying a standard next-generation HBM variant, NVIDIA has confirmed that Feynman will use custom high-bandwidth memory. Given that Rubin uses HBM4 and Rubin Ultra uses HBM4E, analysts speculate the Feynman memory solution may be a bespoke derivative of HBM4E or a custom HBM5 variant — tailored to NVIDIA’s specific capacity and bandwidth targets. The company has not disclosed specific per-package capacity figures, though the direction points firmly toward surpassing the 1 TB mark achieved by Rubin Ultra.

NVIDIA’s CPU Roadmap at a Glance

The Bigger Picture

What NVIDIA announced at GTC 2026 is more than a product launch. It is a declaration that the company intends to compete across every layer of the data center stack — CPUs, GPUs, DPUs, networking, and racks — simultaneously and at scale. Jensen Huang noted that combined Blackwell and Vera Rubin purchase commitments now target $1 trillion through 2027, double the figure from GTC 2025.

The Vera CPU alone won’t immediately displace Intel or AMD in the broader server market — supply constraints are real, CPU wafer capacity is tight industry-wide, and both incumbents continue to ship competitive architectures. But the trajectory is unmistakable. NVIDIA has moved from chip-level competition to system-level competition, offering customers an integrated platform that spans silicon, interconnects, software, and services — with a roadmap stretching to the end of the decade.

Rosa and Feynman are, for now, silhouettes on a horizon. But they are NVIDIA’s signal that this is not a temporary excursion into CPUs. It is a permanent expansion of the battlefield.

Sources: NVIDIA Newsroom (March 16, 2026), Tom’s Hardware, SiliconAngle, PC Gamer, Wccftech, Guru3D, TrendForce — GTC 2026 coverage.