Tenstorrent Unveils TT-Ascalon: A High-Performance RISC-V CPU Challenging the Market

American AI chip company Tenstorrent has announced the launch of TT-Ascalon, a high-performance RISC-V CPU that the company claims surpasses all existing RISC-V processors currently available on the market.

This ambitious entry targets diverse applications including servers, AI infrastructure, automotive high-performance computing (HPC), and advanced driver assistance systems (ADAS).

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Breaking Performance Barriers

The Ascalon architecture represents a significant leap forward in RISC-V processor design.

According to industry-standard SPEC CPU benchmark testing, the processor achieves impressive single-core performance metrics: 22 SPECint 2006/GHz, over 2.3 SPECint 2017/GHz, and exceeding 3.6 SPECfp 2017/GHz.

Operating on Samsung’s SF4X process node, Ascalon can reach clock speeds above 2.5 GHz, demonstrating both robust design capabilities and scalability on advanced manufacturing processes.

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Full RVA23 Compliance and Compatibility

One of Ascalon’s defining characteristics is its complete compatibility with the RISC-V RVA23 specification, according to Divyang Agrawal, Vice President of RISC-V Cores at Tenstorrent.

This compliance ensures that software built for RVA23 can run seamlessly on Ascalon and any other RVA23-compliant processor, providing developers with reliable cross-platform compatibility.

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Advanced Technical Features

The processor integrates a high-performance RVV1.0 vector engine and supports critical enterprise features including hardware virtualization, advanced memory management, and sophisticated interrupt architecture.

Security remains a priority, with Ascalon incorporating RAS (Reliability, Availability, and Serviceability) features and protections against side-channel attacks—increasingly important considerations in an era of heightened cybersecurity concerns.

Immediate Developer Accessibility

Tenstorrent has ensured broad developer adoption by providing comprehensive toolchain support. Ascalon fully supports GCC, LLVM, and QEMU, with all changes already upstreamed to these projects

This means developers and customers can immediately begin deploying and developing for the platform without waiting for ecosystem maturity.

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Strategic Implications

This launch positions Tenstorrent as a serious contender in the growing RISC-V ecosystem, which has gained momentum as companies seek alternatives to traditional x86 and ARM architectures.

The timing is particularly significant as the industry increasingly embraces open-standard architectures for AI and edge computing applications.

With its combination of high performance, broad application support, and open-standard compliance, TT-Ascalon represents Tenstorrent’s bid to establish RISC-V as a viable option for demanding computational workloads previously dominated by proprietary architectures.

Tenstorrent Unveils TT-Ascalon: A High-Performance RISC-V CPU Challenging the Market